This invention relates to electronic devices, for example flat panel displays, and other types of large-area electronic device, comprising a thin-film circuit element. The invention also relates to methods of manufacturing such an electronic device.
There is currently much interest in developing thin-film circuits with thin-film transistors (hereinafter termed xe2x80x9cTFTsxe2x80x9d) and/or other semiconductor circuit elements on glass and on other inexpensive insulating substrates, for large-area electronics applications. Such TFTs fabricated with amorphous or polycrystalline semiconductor films may form the switching elements in a cell matrix, for example in a flat panel display as described in United States Patent Specification U.S. Pat. No. 5,130,829 (Our Ref: PHB 33646), and/or in integrated drive circuits for such cell matrices. Thin-film diodes (hereinafter termed xe2x80x9cTFDsxe2x80x9d) in the form of non-linear switching elements may be used instead of TFTs for the cell matrix of a display device, for example as described in published European Patent Application EP-A-0 649 048 (Our Ref: PHN 14613). United States Patent Specification U.S. Pat. No. 5,272,370 (Our Ref: PHB 33725) describes an example of a different type of large-area electronic device having an array of thin-film circuit elements, in this case a thin-film ROM device comprising different types of TFD having different conduction characteristics to determine the information content of the ROM array. The whole contents of U.S. Pat. No. 5,130,829, EP-A-0 649 048 and U.S. Pat. No. 5,272,370 are hereby incorporated herein as reference material.
In the development and manufacture of large-area electronic devices, it is recognized that the performance of the device can depend critically on the quality of the electrical contact between an electrode and a conductive film of a thin-film circuit element. There is a need to be able to form good quality contacts reproducibly and hence uniformly. A variety of materials are known for the electrodes and conductive films, for example as disclosed in U.S. Pat. No. 5,130,829, EP-A-0 649 048 and U.S. Pat. No. 5,272,370. In most cases the active area of a thin-film circuit element is a semiconductor conductive film most usually of silicon in an amorphous or microcrystalline or polycrystalline form or of a silicon-rich silicon compound. The silicon-based regions may be contacted by electrodes of, for example, chromium, tungsten, zinc, titanium, nickel, molybdenum, aluminium, and indium tin oxide (ITO). These electrodes may themselves be contacted by a conductive film (for example of aluminium, tungsten, molybdenum or ITO) which forms a pattern of interconnection tracks between these circuit elements. In most situations it is desirable for the electrode to make an ohmic contact of low resistance with the semiconductor and with the connection track, although in some cases the requirement is for a Schottky barrier of good quality.
The conference paper xe2x80x9cAn Ohmic Contact Formation Method for Fabricating xcex1-Si TFTs on Large Size Substratesxe2x80x9d by Yukawa et al published in Proceedings of the 9th International Display Research Conference, Oct. 16-18, 1989, Kyoto, Japan, Japan Display ""89, pages 506-509 describes previous difficulties in making uniform low-resistance contacts for bottom drain and source electrodes to the silicon film of a top-gate TFT. These difficulties had resulted in most flat panel displays being formed with bottom-gate TFTs, in spite of the many advantages of top-gate TFTs. The conference paper describes the avoidance of these difficulties by using ITO for the source and drain electrodes and by doping the silicon film with phosphorus from the ITO source and drain electrode patterns. Thus, in the method described in the conference paper, a film of ITO deposited on the device substrate is etched to form a desired pattern of pixel electrodes and source and drain electrodes and tracks for the TFTs, and this ITO pattern is then exposed to an RF glow discharge of PH3 (phosphine). As a result of this phosphine plasma exposure, phosphorus dopant is adhered to the surface of the ITO pattern but not significantly to the SiO2 surface layer of the substrate exposed between the ITO pattern. After an optional etching stage, an undoped amorphous silicon film is then deposited to provide the channel region of the TFT. During this deposition, n+ regions are formed in the amorphous silicon film adjacent the ITO pattern by phosphorus diffusion from the surface of the ITO. This doping of the semiconductor film from the ITO source and drain electrodes results in a good quality low resistance ohmic contact for the source and drain electrodes of the TFT. However, the need to deposit the silicon material on ITO does limit the deposition parameters, for example, to deposition temperatures of less than 250xc2x0 C. Furthermore, some source gas compositions with a hydrogen gas content as commonly used for silicon deposition (for example SiH4 with H2) are preferably not used with this process in order to prevent undesirable interactions with the ITO (for example hydrogen reduction of the ITO). If these limitations are not respected, surface decomposition of the ITO can occur, and the quality of the silicon film can be degraded by impurity diffusion from the ITO.
A top-gate TFT having source and drain electrodes of ITO and in which doped regions are formed in the overlying semi-conductor layer in similar manner through diffusion of phosphorus dopant contained in the ITO is described in EP-B-0 221 361. In this TFT, the ITO source and drain electrodes are formed also with tapered side walls.
It is an aim of the present invention to provide an electrode material suitable for forming good electrical contacts to semiconductor films and/or other conductive films used in thin-film processing for large-area electronic devices, while easing the limitations imposed on the thin-film process parameters.
According to one aspect of the present invention there is provided an electronic device including a thin-film circuit element which comprises an electrode in electrical contact with a conductive film (for example, of a silicon-based material or other semiconductor-based material), characterised in that the electrode comprises a film of chromium nitride.
The present invention is based on the discovery by the present inventors that chromium nitride surprisingly has a particularly advantageous combination of properties for use as an electrode material of thin-film circuit elements. Films of crystalline amorphous chromium nitride with low tensile stress, a range of nitrogen contents and good film integrity can be readily and controllably deposited at low temperature, for example at room temperature, by low-cost reactive sputtering. Chromium nitride processing is compatible with current thin-film circuit element technologies. The chromium nitride films can be patterned using etchants already used in thin-film technology for etching chromium, for example with low-cost wet-etching processes using ammonium ceric nitrate with nitric acid and/or hydrochloric acid. The chromium nitride films are chemically less reactive than chromium itself, ITO and many other electrode materials. They have a low affinity for oxide growth but they still have a relatively high conductivity, as a result of which high resistance barrier interfaces to semiconductor regions and/or to metal conductor tracks can be avoided. A chromium nitride film can protect an underlying film against hydrogen reduction and can also act as an effective barrier against impurity diffusion so protecting semiconductor regions against indium and other impurities. Thus, the chromium nitride film can protect an overlying semiconductor film during deposition, against contamination from an underlying film pattern of, for example, ITO, aluminium, molybdenum or another conductive material. Furthermore, a chromium nitride film pattern can even be used to dope an adjacent semiconductor region with conductivity type determining dopant for example using the plasma doping process described before. Under appropriate conditions, when the chromium nitride film has a very high nitrogen content, the adjacent semiconductor region may even be doped with nitrogen diffused from the chromium nitride film itself. This can be particularly useful with silicon semiconductor films, in which nitrogen is a donor dopant.
It may be noted that laid-open Japanese patent application JP-A-06-275827 discloses forming an electrode from a chromium film which contains at least one element selected from the group of nitrogen, carbon and fluorine, the element content changing across the film thickness to give the upper part of the film a faster etching rate than the lower part. The film composition is adapted to provide the etched electrode with tapered sides so that it is suited for forming, on a device substrate, a bottom gate electrode of a TFT. The tapered shape improves the covering of the gate electrode by an insulating film which provides the gate dielectric of the TFT. The active channel region of the TFT is provided by a semiconductor film which is deposited on this insulating film and which does not contact the gate electrode. In the case of a nitrogen content, the upper part of the film which contains the nitrogen may be removed before the next material (the insulating film) is deposited. JP-A-06-275827 does not disclose the use of chromium nitride as part of an electrode in situations to which the present invention relates nor with the advantages provided in accordance with the present invention.
In an electronic device in accordance with the present invention the electrode may be of chromium nitride throughout its thickness or at least adjacent an area of the conductive film with which it forms electrical contact. This adjacent area of the conductive film may generally comprise a semiconductor material such as, for example, amorphous silicon or microcrystalline silicon or polycrystalline silicon or an amorphous silicon-rich silicon compound material. The chromium nitride film is well suited to forming a bottom electrode able to withstand the subsequent deposition of a semiconductor conductive film and to withstand subsequent processing steps, without degrading the semiconductor film. Deposition temperatures in excess of 250xc2x0 C. (for example up to 300xc2x0 C. or more) may be used. Thus, the electrode comprising the film of chromium nitride may be carried on a substrate of the device, between the substrate and an overlying area of the semiconductor conductive film.
The electrode may be present between the said adjacent area of the semiconductor conductive film and an area which may be a potential source of impurity, for example at the substrate surface. The chromium nitride film of the electrode may provide an impurity diffusion barrier protecting the said adjacent area of the semiconductor conductive film. The potential impurities may be of indium from a film of ITO. Thus, the chromium nitride may provide a barrier against indium diffusion into the said adjacent area of the semiconductor film. This aspect is particularly useful for flat panel displays and other large-area electronic devices in which it is desirable to connect an ITO pattern (for example as a transparent pixel electrode) to a bottom electrode of a thin-film transistor or other circuit element. Furthermore the chromium nitride film can act as an effective diffusion barrier against the penetration of hydrogen during semiconductor CVD (chemical vapour deposition) from a gas source comprising hydrogen, and so hydrogen reduction of ITO can be avoided by providing a chromium nitride barrier film over the ITO.
As already mentioned, the adjacent area of the semiconductor conductive film may be doped with a conductivity type determining dopant concentration extending from the electrode comprising the chromium nitride. The said adjacent area of the semiconductor conductive film may be doped with, for example, boron or phosphorus or another dopant from the electrode. This may be carried out using the plasma doping process described before to adsorb the dopant to the surface of the electrode. Thus, for example, it is found that phosphorus adheres satisfactorily to a chromium nitride film pattern on a device substrate exposed to a phosphine plasma, whereas the applicants find that when a chromium pattern is exposed to such plasma there is insufficient adsorption of phosphorus to the chromium to act as a subsequent diffusion source.
Such an electrode comprising chromium nitride in electrical contact with a semiconductor conductive film may be used in various thin-film circuit element configurations. Thus, for example, the circuit element may be a thin-film transistor, and the electrode may comprise a source electrode or drain electrode or a gate electrode of the transistor. In another form, the circuit element may be a thin-film diode having regions of the semiconductor conductive film doped with opposite conductivity type dopant concentrations to provide a PIN region structure, and an anode and/or cathode electrode of the diode may comprise the chromium nitride film. In yet another form, the circuit element may be a thin-film diode whose semiconductor conductive film is a silicon-rich non-stoichiometric silicon compound material, and the anode and/or cathode electrode of this diode may comprise a chromium nitride film in accordance with the present invention.
According to a second aspect of the second invention, there is provided an electronic device including a thin-film transistor having a gate electrode, a source electrode and a drain electrode, characterised in that at least one of said electrodes comprises a film of chromium nitride. The present invention is particularly advantageous for avoiding and reducing problems in so-called xe2x80x9ctop-gatexe2x80x9d TFTs. In a top-gate TFT, the gate electrode is present on a gate dielectric on an upper face of a semiconductor film which provides a channel region of the TFT.
The present invention can be used with advantage to overcome a particular contact problem to this gate electrode of the top-gate TFT. This gate electrode may be of chromium nitride at least at its upper face, and a gate connection track may contact electrically this upper face of the gate electrode at a window in an insulating film which is provided on the gate electrode. The applicants find that in prior art arrangements with, for example, a chromium gate electrode a hard and insoluble high-resistance surface skin is formed at the face of the gate electrode, particularly when the insulating film is deposited at temperatures in excess of about 250xc2x0 C. When, however, the gate electrode is of chromium nitride at least at its upper face, such a hard and insoluble surface skin is not formed, apparently due to the chemically less reactive nature of chromium nitride and its low affinity for oxide growth. Thus, use of the present invention for the gate electrode of a top-gate TFT permits the insulating film on the gate electrode to comprise silicon oxide and to be deposited at a high temperature so as to have very good insulating properties. These insulating properties can be important at other areas of the device where the insulating film may be present between two crossing conductor tracks.
The source and drain of a top-gate TFT may be formed as top electrodes or as bottom electrodes. The chemically less reactive nature of chromium nitride permits the electrode to withstand subsequent deposition of the semiconductor film and subsequent processing steps. Thus, the source and drain electrodes may comprise chromium nitride and may be present between the substrate and overlying areas of the semiconductor film, which overlying areas are contacted electrically by the source and drain electrodes. Due to its low affinity for oxide growth, these bottom electrodes of chromium nitride can form good electrical contacts to the semiconductor film. Thus, it is advantageous for the source and drain electrodes to be of chromium nitride at least where they contact the overlying areas of the semiconductor film. Furthermore, these overlying areas of the semiconductor film may be doped with a conductivity type determining dopant concentration from the source and drain electrodes.
The chemical reactivity and oxide growth affinity of chromium nitride reduces with increase in the nitrogen content of the chromium nitride. Advantageously, the film of chromium nitride comprises more than 15 atomic percent of nitrogen over at least a part of its thickness. In most cases a much higher atomic percentage will be preferred, for example between 30 and 50 atomic percent of nitrogen over at least a part of the thickness of the film. The inventors find it preferable to have a high nitrogen content adjacent the area of electrical contact. When the chromium nitride is deposited by sputtering in a gas mixture of an inert gas and nitrogen, the nitrogen content of the chromium nitride film is a function of the nitrogen percentage in the gas mixture and also depends on the pressure of the gas mixture. The amount of oxide formed at the chromium nitride surface is a function of the nitrogen percentage of the chromium nitride film. Thus, to reduce the amount of oxide present at the contact surface it is advantageous to have a high nitrogen percentage in the chromium nitride film at the surface. This same nitrogen percentage may be kept throughout the thickness of the film or the film may have a variation in its nitrogen percentage with, for example, the highest percentage being adjacent the surface. The nitrogen content may vary progressively or step-wise through the thickness of the electrode film.
When the N content of the chromium nitride film is between 45% and 50%, its conductivity is reduced by a factor of 2 as compared with a chromium film. It is therefore advantageous to limit the chromium nitride electrode to the contact area, although the chromium nitride may also provide short lengths of conductor tracks. However, it is preferable to provide long conductor tracks of a more conductive material, for example aluminium or molybdenum or even ITO. Aluminium is an excellent material for low resistance tracks, but has potential problems with respect to surface oxidation, hillock formation and potential contamination of an overlying semiconductor film. Embodiments of the present invention permit these problems with aluminium to be overcome or reduced using a chromium nitride film in accordance with the invention. Several advantageous arrangements of the chromium nitride may be used.
Thus, in one such arrangement for a low-resistance connection to a source or drain. electrode of a TFT, the film of chromium nitride may be deposited over a connection track for one of the source and drain electrodes, the connection track being of a material, for example aluminium, having a higher conductivity than the chromium nitride with which it is in electrical contact. The chromium nitride over the connection track can reduce hillock problems which occur with, for example, aluminium, and it can act as a barrier against diffusion of aluminium and other impurity from the connection track into the TFT (or TFD) body. So as to avoid introducing a step-coverage problem and to minimize undesirable interactions with the TFT body, the connection track may be provided at an area of the substrate offset with respect to an area where the transistor is to be formed, and the film of chromium nitride may extend laterally from the connection track to the area of the transistor. Similar arrangements may be used for a low-resistance connection to a TFD thin-film diode.
In the case of a top-gate TFT as the circuit element, when (as described above) the gate electrode is of chromium nitride at least at its upper face, an insulating film of, for example, silicon oxide may be deposited on the gate electrode, and a window may be etched in the insulating film to expose an upper face of the gate electrode for contacting with a low-resistance gate connection track of, for example, aluminium.
According to a third aspect of the present invention, there is provided a method of manufacturing an electronic device comprising a thin-film circuit element having an electrode in electrical contact with a conductive film, including the step of depositing the conductive film on an upper face of the electrode, characterised in that at least adjacent its upper face the electrode comprises a film of chromium nitride.
Such a method may be used with advantage for the manufacture of devices in which the electrode comprising the chromium nitride contacts a semiconductor-based film as a bottom electrode of a thin-film diode or a thin-film transistor. It is particularly advantageous for the manufacture of top-gate TFTs.
Thus, according to a fourth aspect of the present invention, there is provided a method of manufacturing an electronic device comprising a thin-film transistor, including the steps of forming source and drain electrodes on a substrate, depositing a semiconductor film to provide a channel region of the thin-film transistor between the source and drain electrodes, depositing a gate dielectric on an upper face of the semiconductor film, and forming a gate electrode on the gate dielectric, characterised in that at least one of said electrodes comprises a film of chromium nitride.
Thus, the film of chromium nitride may be deposited to provide at least an upper part of the source and drain electrodes before depositing the semiconductor film. This film of chromium nitride may be deposited with a higher nitrogen content adjacent its upper face, after which the source and drain electrodes are formed with tapered side walls by etching the film using a wet etch process. Furthermore, (as already described above) the chromium nitride of the source and drain electrodes may be doped with dopant which determines a conductivity type in the semiconductor film, and overlying areas of the semiconductor film may be doped with a conductivity type determining dopant concentration from the source and drain electrodes during the deposition of the semiconductor film. These source and drain electrodes of chromium nitride may be exposed to a plasma dopant source for the conductivity type determining dopant before depositing the semiconductor film.
By grading the nitrogen content of the chromium nitride film through its thickness, an electrode having tapering, or bevelled, side walls can conveniently be obtained upon etching the film using a wet etch process. Such tapering is beneficial, for example, for the source or drain electrodes in a top-gate TFT, or the lower electrode in a TFD as regards particularly the avoidance of step coverage problems with subsequently deposited layers.